Job Title - Power Engineer
Location - Bay Area, CA (Onsite)
Contract Duration - 1 year.
Work closely with the Design, DV, Implementation team to define low power vectors, generate early and signoff power data using PTPX or any other low power tool.
nalyze power data and work closely with PD and design team to optimize for low power and improve overall PPA.
Support in enhancing low power flows, work with tool vendors to address any power-related tool or flow issues.
Hands-on skills in one of the scripting languages, Shell/TCL/Perl/Python
Experience with correlating pre-silicon power estimates with post-silicon measurements is plus.
Running EMIR on Chip level will be a big boost as well, Redhawk and RHSC experience preferred.